PCB Microstrip Impedance Modeler
Compute microstrip characteristic impedance, propagation delay, and capacitance per length from trace width, dielectric height, copper thickness, and Er.
Impedance Results
Cross-Section
Professional Insights & Guide
The transmission-line math behind controlled-impedance routing, with validity limits and real FR4 numbers.
Core Use Case scenario
When a digital signal's edge rate is fast enough that the trace length exceeds about a tenth of the signal wavelength, the trace stops behaving like a wire and starts behaving like a transmission line. Matching its characteristic impedance to the source and load prevents reflections that cause ringing and false triggering. The microstrip formula computes that impedance from the trace width, the dielectric height, and the copper thickness, and the same geometry gives the delay and the capacitance that matter for timing.
Troubleshooting & Edge-Case Failure Points
- Formula validity: the approximation holds for 0.1 < w/h < 3.0 and 1 < Er < 15; beyond that use a field solver.
- Etched width: the copper is narrower after etching than the drawn width — compensate with the fabricator's etch factor.
- Solder mask: mask over the trace lowers impedance a couple of ohms; on dense boards ask for mask-defined impedance.
- Invalid geometry: if 5.98h/(0.8w+t) falls below 1 the natural log goes negative — the tool flags it as impractical.
Detailed Step-by-Step Instructions
- Enter the trace width, dielectric height, and copper thickness in your preferred unit.
- Set the dielectric constant (4.3 for typical FR4; 3.4–3.6 for low-loss laminates).
- Press Compute Impedance and review Z0, εeff, propagation delay, and capacitance per length.
- To hit a target like 50 Ω, enter the target and press Solve Width — the required trace width is filled in for you.
- Copy the results into your stackup or routing note for the fabrication review.
Formulas Used
Z0 = 87 / sqrt(Er + 1.41) * ln(5.98h / (0.8w + t)) // ohms, dims in mils eps_eff = (Er+1)/2 + (Er-1)/2 / sqrt(1 + 12h/w) t_pd = sqrt(eps_eff) / c // propagation delay per length C = sqrt(eps_eff) / (c * Z0) // capacitance per length L = Z0^2 * C // inductance per length Valid range: 0.1 < w/h < 3.0, 1 < Er < 15
Professional Insights & Guide
The transmission-line math behind controlled-impedance routing, with validity limits and real FR4 numbers.
Core Use Case scenario
When a digital signal's edge rate is fast enough that the trace length exceeds about a tenth of the signal wavelength, the trace stops behaving like a wire and starts behaving like a transmission line. Matching its characteristic impedance to the source and load prevents reflections that cause ringing and false triggering. The microstrip formula computes that impedance from the trace width, the dielectric height, and the copper thickness, and the same geometry gives the delay and the capacitance that matter for timing.
Troubleshooting & Edge-Case Failure Points
- Formula validity: the approximation holds for 0.1 < w/h < 3.0 and 1 < Er < 15; beyond that use a field solver.
- Etched width: the copper is narrower after etching than the drawn width — compensate with the fabricator's etch factor.
- Solder mask: mask over the trace lowers impedance a couple of ohms; on dense boards ask for mask-defined impedance.
- Invalid geometry: if 5.98h/(0.8w+t) falls below 1 the natural log goes negative — the tool flags it as impractical.
Detailed Step-by-Step Instructions
- Enter the trace width, dielectric height, and copper thickness in your preferred unit.
- Set the dielectric constant (4.3 for typical FR4; 3.4–3.6 for low-loss laminates).
- Press Compute Impedance and review Z0, εeff, propagation delay, and capacitance per length.
- To hit a target like 50 Ω, enter the target and press Solve Width — the required trace width is filled in for you.
- Copy the results into your stackup or routing note for the fabrication review.
Formulas Used
Z0 = 87 / sqrt(Er + 1.41) * ln(5.98h / (0.8w + t)) // ohms, dims in mils eps_eff = (Er+1)/2 + (Er-1)/2 / sqrt(1 + 12h/w) t_pd = sqrt(eps_eff) / c // propagation delay per length C = sqrt(eps_eff) / (c * Z0) // capacitance per length L = Z0^2 * C // inductance per length Valid range: 0.1 < w/h < 3.0, 1 < Er < 15
Informative Guides & Helper Articles
Ultimate Guide to PCB Microstrip Impedance
The microstrip formula, effective dielectric constant, delay, and capacitance, and how controlled impedance design works.
Read Article →Best Practices for PCB Microstrip Design
Consistent stackups, continuous reference planes, etch compensation, and avoiding plane splits under high-speed traces.
Read Article →Common Errors in PCB Microstrip Impedance
Mixing units, using pre-etch width, ignoring thickness, out-of-range w/h, and the wrong Er for FR4 laminates.
Read Article →Top Optimization Tips for PCB Microstrips
Differential pairs, length matching, back-drilling, via minimization, and impedance coupons for high-speed routing.
Read Article →Future Trends in PCB Microstrip Impedance
Millimeter-wave routing, glass-core substrates, low-loss laminates, and AI-driven impedance verification.
Read Article →How to Use the PCB Impedance Calculator
Computes controlled-impedance traces - microstrip and stripline - from stackup geometry and dielectric constant.
- Enter trace width, height above plane, copper thickness, Er (4.2-4.5 FR4).
- Pick microstrip or stripline; read Z0.
- Iterate width to target (50 ohm single-ended, 90/100 differential).
Microstrip Z0: the Classic
Z0 = (87/sqrt(Er+1.41)) x ln(5.98h/(0.8w+t)) - impedance rises with height h, falls with width w. Practical FR4: a 50-ohm trace wants width ~2x dielectric height. Differential pairs (USB, PCIe) target 90-100 ohm. Manufacturing reality: controlled impedance is ordered as a target, not a width - fabs tune width to their etch and resin, +/-10%. Er falls with frequency (4.4 to ~3.9 by 5 GHz), which is why high-speed stackups simulate with frequency-dependent models.
PCB Impedance Calculator FAQ
What width gives 50 ohms on FR4?
Roughly twice the dielectric height for surface microstrip. The fab finalizes to the impedance target.
Microstrip vs stripline?
Stripline runs lower impedance for the same geometry and shields better; microstrip is accessible and slightly radiative.
Specify width or impedance to the fab?
Impedance. You own the stackup; they own the etch.